Scicos to SynDEx gateway

Context

The Scicos/SynDEx gateway was formerly developped inside the ECLIPSE RNTL project (2003-2005) whose PSA was the main industrial partner. It is presently maintained and developed in the AOSTE INRIA project-team.

Objectives

The Scicos and SynDEx softwares are based on different formalisms. Scicos is a graphical architecture-independent dynamical system modeler and simulator toolbox included in the Scicoslab engineering and scientific computation software, whereas SynDEx is a system level CAD software for prototyping and optimizing the implementation of distributed real-time embedded applications onto "multicomponent" architectures. A semantic gap between the two softwares prevents a direct translation from a Scicos model to a SynDEx one.

The Scicos/SynDEx gateway provides a way to convert a Scicos model into a SynDEx one allowing the implementation of a model specified with Scicos onto a multiprocessor architecture via SynDEx while verifying real-time constraints. Once the model is implemented, i.e. distributed and scheduled onto the target architecture, the user can automatically generate a safe and optimized real-time code which runs and run on the specified architecture. Then, the user can compare the results obtained during the Scicos simulation with those obtained during the real-time execution, and consequently modify the initial Scicos dynamical model if needed.

The development process

A user wishing to develop and implement a dynamical model onto a target architecture must go through the following steps:

• model and simulate the dynamical system with Scicos,
• export a subsystem (usually the discrete controler) to SynDEx via the gateway to specify the algorithm to implement,
• specify the target architecture with SynDEx,
• launch the SynDEx Adequation heuristic based on distributed real-time scheduling analyses which distributes and schedules the model (algorithm) onto the target architecture while verifying real-time constraints,
• launch the SynDEx automatic code generation, compile the real-time code and execute it onto the target architecture,
• exploit the results, and if necessary, modify the initial dynamical model with Scicos, and start again.

The figure below presents the complete development process from the Scicos modeling to the real-time multiprocessor execution onto the target architecture.

Gateway principles

The figure below shows how the Scicos To SynDEx gateway interacts with Scicos and SynDEx.

More precisely, the gateway provides the following functionalities:

- graph translation:

The Gateway generates a SynDEx model (.sdx file) corresponding to the initial Scicos model. It allows any Scicos control flow model including any amount of standard and logical blocs (if-then-else) and translates it into a conditionned data flow model with the SynDEx format. Note that the model must include one and only one activation input ;

- code generation:

The Gateway automatically generates the files needed to go through the macro expansion process needed in order to obtain the target code. These files automate the link between the SynDEx generated M4 macro-code and the Scicos functions C code during the macro expansion process (see SynDEx documentation for details about SynDEx code generation) ;

- continuous time management:

Continuous Scicos blocs are also allowed, the user just has to specify the discrete and continous step then the gateway automatically implements an Euler solver in the generated code.

How to use it

The gateway allows the user to translate any Scicos superbloc with one activation input port (synchronous), no activation output port and any number of data input/output ports. The figure below shows some eligible superblocs.

When a superbloc has been fully specified with Scicos, the user just has to:

1. Select the superbloc.
2. Click on Tools -> Generate SynDEx code in the Scicos menu,

Once the translation process is over, a pop-up window asks the user to specify some parameters.

• Absolute application path: the path where the SynDEx files will be generated
• Application name (without suffix): the application name
• SynDEx macro path: the path where the SynDEx macros are located (usually the path to SynDEx + "/macros")
• Number of iterations: the number of steps the final application has to process
• discrete step: the discrete step value (usefull when continuous blocs are present)
• continuous step: the integration step value (usefull when continuous blocs are present)

The .sdx and .m4 files are then generated into the user specified path and can be processed by SynDEx.

Installation

• Download the gateway code and extract it into the "contrib" subdirectory of your Scicoslab installation directory. (If you do not succeed, please read the README file in the archive)
• Launch Scicoslab and click on toolboxes -> Scicos2SynDEx